1. Technical Field of the Invention
The present invention relates to integrated circuits and, more particularly, to integrated circuits comprising at least one three-dimensional capacitor.
2. Description of Related Art
It is known to produce three-dimensional capacitors using an aluminum technology (reactive ion etching, RIE) or copper technology (Damascene).
The three-dimensional capacitor is conventionally obtained by depositing a capacitive metal-insulator-metal (MIM) stack in which the lower layer is a conductive material, for example TiN. The insulator is a dielectric material of any permittivity (low, medium or high) and the upper electrode is a conductive material, for example TiN, in trenches which are obtained after etching the intermetallic insulating or dielectric material. Such capacitive trenches have high access resistances, however, particularly at the external electrode which is referred to as the lower electrode. The capacitive value of the capacitor furthermore depends on the depth of the trenches. It moreover proves difficult to ensure good etching reproducibility from one batch of wafers to another, which results in a dispersion of the capacitive values of theoretically identical capacitors.